SmartMX P5CD012 CPU chip cards
CMOS14 SmartMX family properties
The long-established CMOS14 SmartMX family features a significantly
enhanced secure smart card IC architecture. Extended instructions
for Java and C code, linear addressing, high speed at low power and
a universal memory management unit are among many other
improvements added to the classic 80C51 core architecture. The
technology transfer step from 5-metal layer 0.18 μm to 5-metal
layer 0.14 μm CMOS technology offers more advantages in terms of
security features, memory resources, crypto coprocessor calculation
speed for RSA and ECC as well as availability of secure hardware
support for 2-key and 3-key Digital Encryption Standard (DES) and
Advanced Encryption Standard (AES) operations.
The contact interface availability, the optional contactless
interface and the optional S²C interface enable the easy
implementation of native or open platform and multi-application
operating systems in market segments such as banking, E-passports,
ID cards, Health cards, secure access, Java cards, Near Field
Communication (NFC) connectable mobile hand sets as well as Trusted
Platform Modules (TPM).
Triple-DES coprocessor
The DES widely used for symmetric encryption is supported by a
dedicated, high performance, highly attack-resistant hardware
coprocessor. Single DES and triple-DES, based on two or three DES
keys, can be executed within less than 40 μs. Relevant standards
(ISO/IEC, ANSI, FIPS) and Message Authentication Code (MAC) are
fully supported. A secure crypto library element for DES is
available.
AES coprocessor
SmartMX is the first smart card microcontroller platform to provide
a dedicated high performance 128-bit parallel processing
coprocessor to support secure AES. The implementation is based on
FIPS197 as standardized by the National Institute for Standards and
Technology (NIST), and supports key lengths of 128-bit, 192-bit,
and256-bit with performance levels comparable to DES. AES is the
next generation for symmetric data encryption and recommended
successor to DES providing a significantly improved security level.
A secure crypto library element for AES is available.
Security features
SmartMX incorporates a wide range of both inherent and
OS-controlled security features as countermeasure against all types
of attack. Semiconductors apply their extensive knowledge of chip
security, combined with handshaking circuit technology, very dense
5-metal layer 0.14 µm technology, glue logic and active shielding
methodology for optimum results in CC EAL5+, EMVCo and other
third-party certifications and approvals.
SmartMX Memory Management Unit (MMU), designed to define various
memory segments and assign security attributes accordingly,
supports a strong firewall concept that keeps different
applications separate from each other. Only the System mode has
full access privileges to all memory space and on-chip peripherals,
in User mode the privileges are limited. User mode restrictions are
configurable by software running in System mode.
The SmartMX security features are acknowledged as having
outstanding properties by most Semiconductors’ customers. The
countermeasures against light attacks are regarded as
“best-in-class”.
Security evaluation and certificates
Hardware security certification in accordance with CC EAL5+ is
attained. Also, third-party approval such as EMVCo (VISA, CAST),
ZKA and others, depending on the application requirements, are
available.
Parameters:
Chip: SmartMX P5CD012
Cards size:85.5×54×0.84mm,or customer specified size
Induction distance:2cm-10cm
Materials:PVC/PET/PETG/ABS/PHA,0.13 copper wire
EEPROM: 12KB
Endurance: > 500,000 times
Data retention time: > 25 years
Ambient temperature: -25℃-+85℃
CIU fully compatible with ISO/IEC 14443A
13.56 MHz operating frequency
fully supports the T=CL protocol in accordance with ISO/IEC 14443-4
supported data transfer rates: 106 kbit/s, 212 kbit/s, 424 kbit/s
and 848 kbit/s
reader infrastructure compatibility via optional 1K or 4K emulation
including built-in anticollision support
Two additional I/O ports: IO2 and IO3 for full-duplex serial data
communication
P5CN080 and P5CN144 S²C interface
One additional I/O port: IO2 for full-duplex serial data
communication
Security features
Enhanced security sensors: Low and high clock frequency sensor
Low and high temperature sensor
Low and high supply voltage sensor
Single Fault Injection (SFI) attack detection
Light sensors (included integrated memory light sensor
functionality)
Electronic fuses for safeguarded mode control
Active shielding
Unique ID for each die
Clock input filter for protection against spikes
Power-up and power-down reset
Optional programmable card disable feature
Memory security (encryption and physical measures) for RAM, EEPROM
and ROM
Memory Management Unit (MMU) including memory protection: Secure
multi-application operating systems via two different operation
modes: System mode and User mode
OS-controlled access restriction mechanism to peripherals in User
mode
Memory mapping up to 8 MB code memory
Memory mapping up to 8 MB (64-kbit) data memory
Optional disabling of ROM read instructions by code executed in
EEPROM
Optional disabling of any code execution out of RAM
EEPROM programming:
No external clock
Hardware sequencer controlled
On-chip high voltage generation
Enhanced error correction mechanism
64 B or 128 B EEPROM for customer-defined security FabKey,
featuring batch-, wafer- or die-individual security data, included
encrypted diversification features on request
14 B user write-protected security area in EEPROM (byte access,
inhibit functionality per byte)
32 B write-once security area in EEPROM (bit access)
32 B user read-only area in EEPROM (byte access)
Customer-specific EEPROM initialization available
Design-in support
Approved development tool chain: Keil PK51 development tool package
including µVision3/dScope C51 simulator, additional specific
hardware drivers including simulation of contactless interface and
ISO/IEC 7816 card interface board. A SmartMX DBox allows software
debugging and integration tests.
Ashling Ultra-Emulator platform, stand-alone ROM prototyping boards
and ISO/IEC 7816 and ISO/IEC 14443 card interface board. Code
coverage and performance measurement software tools for real-time
software testing.
Dual interface dummy modules OM6711 (PDM 1.1 - SOT658) with special
antenna bonding on C4 and C8 for testing the implanting process and
antenna connection.
Tutorial C source libraries for: contactless communication in
accordance with ISO/IEC 14443, Part 3 and 4
T = 1 communication in accordance with ISO/IEC 7816, Part 3
EEPROM Read/Write routines
200 KB user ROM
6144 B RAM
High-performance secure Public Key Infrastructure (PKI) coprocessor
(RSA, ECC)
Secure dual/triple-DES coprocessor
Secure AES coprocessor
Memory Management Unit (MMU)
ISO/IEC 7816 contact interface
Optional ISO/IEC 14443 A Contactless Interface Unit (CIU)
Optional S²C interface for NFC communication link
5-metal layer 0.14 µm CMOS technology
Optional certified crypto library modules for RSA, ECC, DES, AES,
SHA and PRNG
Application areas: Banking,Java cards,E-passports,ID cards,Secure
access,Trusted platform modules.Even can realize a card can go
through access cash, transfer and settlement currency, shopping
consumption, such as financial business, and can be applied to
public transport, taxis, highway, tourism, Residential water,
electricity, gas and other micro-payment fee.
Aviable Crafts
Printing: Offset Printing,Silkscreen Printing,Thermal
printing,Ink-jet printing,Digital printing.
Security features: Laser ablation,Hologram/OVD,UV ink,Optical
Variable ink,Hidden barcode/Barcode mask,Graded Rainbow,Micro-text.
Others: Signature panel,Barcode,Serial
number,Embossing,Encoding,Die-cut.
Download SmartMX P5CD012 CPU chips information :